DUAL J-K FLIP-FLOPS WITH CLEAR

文件：493.55 Kbytes 页数：12 Pages

TI

德州仪器

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOWtransition of the clock. A LOW signal on CD input overrides the other inputs and makes th

文件：128.06 Kbytes 页数：4 Pages

Motorola

摩托罗拉

Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

文件：119.69 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

文件：119.69 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

文件：119.69 Kbytes 页数：6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司