SN54HC241数据手册TI中文资料规格书

描述 Description

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC241 devices are organized as two 4-bit buffers/drivers with separate output-enable (1OE\\ and 2OE) inputs. When 1OE\\ is low or 2OE is high, the device passes noninverted data from the A inputs to the Y outputs. When 1OE\\ is high or 2OE is low, the outputs for the respective buffers/drivers are in the high-impedance state.

特性 Features

• Wide Operating Voltage Range of 2 V to 6 V
• High-Current Outputs Drive Up To 15 LSTTL Loads
• Low Power Consumption, 80-µA Max ICC
• Typical tpd =11 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 µA Max
• 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers