SN54BCT646数据手册TI中文资料规格书

描述 Description

These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices.
Output-enable (OE)\\ and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus will receive data when OE\\ is low. In the isolation mode (OE\\ high), A data can be stored in one register and/or B data can be stored in the other register.

特性 Features

• State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
• Bus Transceivers/Registers
• Independent Registers and Enables for A and B Buses
• Multiplexed Real-Time and Stored Data
• ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)