SN54ACT74中文资料具有清零和预置端的双路正边沿触发式 D 型触发器数据手册TI规格书

描述 Description

The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops.

A low level at the preset (PRE)\\ or clear (CLR)\\ input sets or resets the outputs, regardless of the levels of the otherinputs. When PRE\\ and CLR\\ are inactive (high), data at the data (D) input meeting the setup-time requirements is transferredto the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directlyrelated to the rise time of the clock pulse. Following the hold-time interval, data at D can be changed without affecting thelevels at the outputs.

特性 Features

• 4.5-V to 5.5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Max tpd of 10.5 ns at 5 V
• Inputs Are TTL-Voltage Compatible