50/30/100-MHz PRESETTABLE DECADE OR BINARY COUNTERS/LATCHES

Performs BCD, Bi-Quinary, or Binary Counting Fully Programmable Fully independent Clear Input Input Clamping Diodes Simplify System Design Output QA Maintains Full Fan-out Capability In Addition to Driving Clock-2 Input

文件：666.31 Kbytes 页数：14 Pages

TI

德州仪器

50/30/100-MHz [RESETTABLE DECADE OR BINARY COUNTERS/LATCHES

文件：779.54 Kbytes 页数：17 Pages

TI

德州仪器

50/30/100Mhz 可预设十进制或二进制计数器/锁存器

These high-speed monolithic counters consist of four d-c coupled, master-slave flip-flops, which are internally interconnected to provide either a divide-by-two and a divide-by-five counter (’196, ’LS196, ’S196) or a divide-by-two and a divide-by-eight counter (’197, ’LS197, ’S197). These four count ·Performs BCD, Bi-Quinary, or Binary Counting ·Fully Programmable ·Fully Independent Clear Input ·Input Clamping Diodes Simplify System Design ·Output QA Maintains Full Fan-out Capability In Addition to Driving Clock-2 Input;

TI

德州仪器

丝印：SN54197J；Package：CDIP；50/30/100-MHz PRESETTABLE DECADE OR BINARY COUNTERS/LATCHES

Performs BCD, Bi-Quinary, or Binary Counting Fully Programmable Fully independent Clear Input Input Clamping Diodes Simplify System Design Output QA Maintains Full Fan-out Capability In Addition to Driving Clock-2 Input

文件：666.31 Kbytes 页数：14 Pages

TI

德州仪器

丝印：SN54197J；Package：CDIP；50/30/100-MHz PRESETTABLE DECADE OR BINARY COUNTERS/LATCHES

Performs BCD, Bi-Quinary, or Binary Counting Fully Programmable Fully independent Clear Input Input Clamping Diodes Simplify System Design Output QA Maintains Full Fan-out Capability In Addition to Driving Clock-2 Input

文件：666.31 Kbytes 页数：14 Pages

TI

德州仪器

50/30/100-MHz [RESETTABLE DECADE OR BINARY COUNTERS/LATCHES

文件：779.54 Kbytes 页数：17 Pages

TI

德州仪器

50/30/100-MHz [RESETTABLE DECADE OR BINARY COUNTERS/LATCHES

文件：779.54 Kbytes 页数：17 Pages

TI

德州仪器