SMJ27C256数据手册Austin Semiconductor中文资料规格书

描述 Description

GENERAL DESCRIPTION
The SMJ27C256 series is a set of 262,144 bit, ultraviolet light erasable, electrically programmable read-only memories. These devices are fabricated using power-saving CMOS technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including program data inputs) can be driven by Series 54 TTL circuits without the use of external pullup resistors. Each output can drive one Series 54 TTL circuit without external resistors. The data outputs are 3-state for connecting multiple devices to a common bus. The SMJ27C256 is pin-compatible with 28-pin 256K ROMs and EPROMs. It is offered in a 600mil dual-in-line ceramic pagackage (J suffix) rated for operation from -55°C to 125°C.FEATURES
• Organized 32,768 x 8
• Single +5V ±10% power supply
• Pin-compatible with existing 256K ROM’s and EPROM’s
• All inputs/outputs fully TTL compatible
• Power-saving CMOS technology
• Very high-speed SNAP! Pulse Programming
• 3-state output buffers
• 400-mV DC assured noise immunity with standarad TTL loads
• Latchup immunity of 250 mA on all input and output pins
• Low power dissipation (CMOS Input Levels)
   Active - 165mW Worst Case
   Standby - 1.7mW Worst Case (CMOS-input levels)

特性 Features

• Organized 32,768 x 8
• Single +5V ±10% power supply
• Pin-compatible with existing 256K ROM’s and EPROM’s
• All inputs/outputs fully TTL compatible
• Power-saving CMOS technology
• Very high-speed SNAP! Pulse Programming
• 3-state output buffers
• 400-mV DC assured noise immunity with standarad TTL loads
• Latchup immunity of 250 mA on all input and output pins
• Low power dissipation (CMOS Input Levels)
   Active - 165mW Worst Case
   Standby - 1.7mW Worst Case (CMOS-input levels)