SM802XXX数据手册Microchip中文资料规格书

描述 Description

The SM802XXX series is a high performnace family of devices that provide an extremely low-noise timing solution for applications such as (1-100) Gigabit Ethernet, SONET, Wireless base station, Satellite communication, Fibre Channel, SAS/SATA and PCI-e. It is based upon a unique PLL architecture that provides less than 250fs phase jitter.The devices operate from a 2.5V or 3.3V power supply and synthesize up to 8 different combinations (LVPECL, LVDS, HCSL) of differential or 16 single ended output clocks. The devices accept an external reference clock or crystal input.Configure a part to your specific requirements with the CLOCKWORKS CONFIGURATOR tool.

特性 Features

·115fs at 156.25MHz (1.875MHz to 20MHz)
·245fs at 156.25MHz (12kHz to 20MHz)
·On chip power supply regulation for excellent board level power supply noise immunity
·Generates up to 8 combinations of differential or 16 single-ended clock outputs.
·LVPECL, LVDS, HCSL, LVCMOS (SE or Diff)
·Selectable input:
·Crystal: 11MHz to 30MHz
·Reference input: 11MHz to 80MHz
·No external crystal oscillator capacitors required
·2.5V or 3.3V operating power supply
·Available in Industrial Temperature range
·Available in Green, RoHS, and PFOS compliant QFN packages:·44-pin 7mm x 7mm
·32-pin 5mm x 5mm
·24-pin 4mm x 4mm
·16-pin 3mm x 3.5mm