SM5166AV中文资料PLL Synthesizer IC数据手册NPC规格书

描述 Description

OVERVIEW
The SM5166AV is a PLL synthesizer IC developed for application in pagers and fabricated using NPC’s Molybdenum-gate CMOS process. It incorporates independently-controlled reference frequency and operating frequency dividers, and operates from a low-voltage supply to realize low power dissipation. It features a charge pump that operates at 3 V, making possible a wide range of VCO designs.FEATURES
■ Operating frequency
  
• fFIN = 100 MHz (VDD1 = 1.00 V)
  
• fFIN = 90 MHz (VDD1 = 0.95 V)
■ Reference frequency
  
• fXIN = 25 MHz
      (VDD1 = 0.95 V, External Input)
  
• fXIN = 16 MHz*
      (VDD1 = 0.95 V, Internal oscillaton)
   NOTE) * : NPC’s recommended frequency. Confirm with crystal supplier.
■ Unlock signal output pin
■ Output circuit for passive filter connection
■ −10 to 60 °C operating temperature range
■ Standby function for low current consumption
■ Boost-up signal output for fast locking
■ Supply voltages
  
• VDD1 = 0.95 to 1.5 V (prescaler, counters)
  
• VDD2 = 2.0 to 3.3 V (charge pump)
■ 40 to 65528 reference frequency divider ratio range (with 1/8 prescaler built-in) set by serial input data
■ 1056 to 65535 operating frequency divider ratio range set by serial input data
■ 16-pin VSOP
■ Molybdenum-gate CMOS process

特性 Features

■ Operating frequency
  
• fFIN = 100 MHz (VDD1 = 1.00 V)
  
• fFIN = 90 MHz (VDD1 = 0.95 V)
■ Reference frequency
  
• fXIN = 25 MHz
      (VDD1 = 0.95 V, External Input)
  
• fXIN = 16 MHz*
      (VDD1 = 0.95 V, Internal oscillaton)
   NOTE) * : NPC’s recommended frequency. Confirm with crystal supplier.
■ Unlock signal output pin
■ Output circuit for passive filter connection
■ −10 to 60 °C operating temperature range
■ Standby function for low current consumption
■ Boost-up signal output for fast locking
■ Supply voltages
  
• VDD1 = 0.95 to 1.5 V (prescaler, counters)
  
• VDD2 = 2.0 to 3.3 V (charge pump)
■ 40 to 65528 reference frequency divider ratio range (with 1/8 prescaler built-in) set by serial input data
■ 1056 to 65535 operating frequency divider ratio range set by serial input data
■ 16-pin VSOP
■ Molybdenum-gate CMOS process