1 to 19 Differential Clock Buffer

Features •Intel DB1900Z Clock Specification Revision 1.0 •1:19 Differential Zero Delay Buffer •PCIe Gen 2/Gen3 & Intel ® QPI •100ps Input to Output Delay •HCSL Output Buffer •Configuration PLL (ZDB) and Bypass Mode •Programmable PLL Bandwidth •72 pin QFN package (6/6 RoHS Compliant)

文件：707.19 Kbytes 页数：22 Pages

RENESAS

瑞萨

1 to 19 Differential Clock Buffer

Renesas

瑞萨

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

文件：512.63 Kbytes 页数：14 Pages

TI

德州仪器

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

文件：1.06224 Mbytes 页数：16 Pages

TI

德州仪器

SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL

Counts 8-4-2-1 BCD or Binary Single Down/Up Count Control Line Count Enable Control Input Ripple Clock Output for Cascading Asynchronously Presettable with Load Control Parallel Outputs Cascadable for n-Bit Applications

文件：627 Kbytes 页数：17 Pages

TI

德州仪器