SLG46811开发板套件编程器的评估板-嵌入式-复杂逻辑器件(FPGA,CPLD)规格书PDF中文资料

厂商型号 |
SLG46811 |
参数属性 | SLG46811 包装为盒;类别为开发板套件编程器的评估板-嵌入式-复杂逻辑器件(FPGA,CPLD);产品描述:20-PIN DIP PROTO BOARD SLG46811 |
功能描述 | GreenPAK Programmable Mixed-Signal Matrix |
文件大小 |
2.67587 Mbytes |
页面数量 |
172 页 |
生产厂商 | Renesas Technology Corp |
企业简称 |
RENESAS【瑞萨】 |
中文名称 | 瑞萨科技有限公司官网 |
原厂标识 | ![]() |
数据手册 | |
更新时间 | 2025-5-2 17:22:00 |
人工找货 | SLG46811价格和库存,欢迎联系客服免费人工找货 |
SLG46811规格书详情
General Description
The SLG46811 provides a small, low power component for commonly used Mixed-Signal functions. The user creates their
circuit design by programming the one time programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect
logic, the IO Pins, and the macrocells of the SLG46811. This highly versatile device allows a wide variety of Mixed-Signal
functions to be designed within a very small, low power single integrated circuit.
Key Features
Applications
General Description
The SLG46811 provides a small, low power component for commonly used Mixed-Signal functions. The user creates their
circuit design by programming the one time programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect
logic, the IO Pins, and the macrocells of the SLG46811. This highly versatile device allows a wide variety of Mixed-Signal
functions to be designed within a very small, low power single integrated circuit.
Multichannel Sampling Analog Comparator (MS ACMP)
Sampling up to Four Analog Channels
Selectable Voltage Reference for Each Channel
Different Sampling Scenarios
Synchronous or Asynchronous Result Appearance
Integrated Voltage References (Vref)
Twelve Combination Function Macrocells
Two 2-Bit LUT or DFF/LATCH Macrocells
One Selectable Programmable Pattern Generator or 2-
bit LUT
Four 3-Bit LUT or DFF/LATCH with Set/Reset
Four Selectable DFF/LATCH or 3-bit LUTs or Shift
Registers
One 4-Bit LUT or DFF/LATCH with Set/Reset Macrocell
Six Multi-Function Macrocells
Five Selectable DFF/LATCH or 3-bit LUTs + 8-bit
Delay/Counters
One Selectable DFF/LATCH or 3-bit LUTs + 8-bit
Delay/Counter/FSM
Extended Pattern Generator
Up to 8 Parallel Outputs
92 bytes Pattern Stored in the NVM
Serial Communications
I
2C Protocol Interface
Programmable Delay with Edge Detector Output
Deglitch Filter or Edge Detector
Two Oscillators (OSC)
Selectable 2.048 kHz or 10 kHz Oscillator
25 MHz Oscillator
Analog Temperature Sensor
Power-On Reset (POR) with CRC
Read Back Protection (Read Lock)
Power Supply
2.3 V ≤ VDD ≤ 5.5 V
Operating Temperature Range: -40 °C to 85 °C
RoHS Compliant/Halogen-Free
Available Package
12-pin STQFN: 1.6 mm x 1.6 mm x 0.55 mm, 0.4 mm
pitch
产品属性
- 产品编号:
SLG46811V-DIP
- 制造商:
Dialog Semiconductor GmbH
- 类别:
开发板,套件,编程器 > 评估板 - 嵌入式 - 复杂逻辑器件(FPGA, CPLD)
- 系列:
GreenPAK™
- 包装:
盒
- 类型:
CPLD
- 配套使用/相关产品:
SLG46811
- 内含物:
板
- 描述:
20-PIN DIP PROTO BOARD SLG46811
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
Dialog |
22+ |
NA |
8760 |
原装正品支持实单 |
询价 | ||
Dialog |
21+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
戴泺格 |
22+ |
NA |
500000 |
万三科技,秉承原装,购芯无忧 |
询价 | ||
DialogSemiconductorGmbH |
23+ |
20-UFQFN |
3720 |
只做原装,主打品牌QQ询价有询必回 |
询价 | ||
RENESAS |
8 |
询价 | |||||
RENESAS |
24+ |
con |
8 |
现货常备产品原装可到京北通宇商城查价格 |
询价 | ||
Dialog Semiconductor |
20+ |
TSSOP-20 |
29860 |
可编程SPLD-可开原型号增税票 |
询价 | ||
SILEGO |
19+ |
TSSOP20 |
1764 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
DIALOG |
23+ |
QFN |
2484 |
全新原装正品现货,支持订货 |
询价 | ||
24+ |
N/A |
75000 |
一级代理-主营优势-实惠价格-不悔选择 |
询价 |