SLG46108-EV中文资料瑞萨数据手册PDF规格书

▪ Logic and mixed-signal circuits

▪ Highly versatile macrocells

▪ Four combinatorial look up tables (LUTs)

• Two 2-bit LUTs

• Two 3-bit LUTs

▪ Seven combination function macrocell

• Two selectable D Flip-Flop/LATCHES (DFF) or

2-bit LUTs

• Two selectable D Flip-Flop/LATCHES (DFF) or

3-bit LUTs

• One selectable Pipe Delay or 3-bit LUT

◦ Pipe Delay – 8 stage/2 output

• One selectable counter/delay (CNT/DLY) or 4-bit

LUT

• One programmable delay/deglitch filter

▪ Three 8-bit counter/delay generators (CNT/DLY)

with external clock/reset

▪ RC oscillator (RC OSC)

▪ Power-on reset (POR)

▪ 1.8 V (±5 %) to 5 V (±10 %) supply

▪ Operating temperature range: -40 °C to 105 °C

▪ RoHS compliant/Halogen-free

▪ Pb-free 8-pin STQFN: 1.0 mm x 1.2 mm x 0.55

mm, 0.4 mm pitch