SL74HC4046D中文资料Phase-locked loop. High-performance silicon-gate CMOS.数据手册SLS规格书

描述 Description

The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC4046 phase-locked loop contains three phase comparators, a voltage-controlled oscillator (VCO) and unity gain op amp DEMOUT. The comparators have two common signal inputs, COMPIN, and SIGIN. Input SIGIN and COMPIN can be used directly coupled to large voltage signals, or indirectly coupled (with a series capacitor to small voltage signals). The self-bias circuit adjusts small voltage signals in the linear region of the amplifier.· Low Power Consumption Characteristic of CMOS Device
· Operating Speeds Similary to LS/ALSTTL
· Wide Operating Voltage Range: 3.0 to 6.0 V
· Low Input Current: 1.0 mA Maximum (except SIGIN and COMPIN)
· Low Quiescent Current: 80 mA Maximum (VCO disabled)
· High Noise Immunity Characteristic of CMOS Devices
· Diode Protection on all Inputs