Low Voltage 1:9 Differential ECL/ PECL Clock Driver

Description The SK10/100LVE111 is a low skew 1-to-9 differential driver designed with clock distribution in mind. The SK10/100LVE111’s function and performance are similar to the SK100E111, with the added feature of low voltage operation and the enable input. It accepts one signal input which can

文件：150.33 Kbytes 页数：6 Pages

SEMTECH

先之科

Low Voltage 1:9 Differential ECL/PECL Clock Driver with Enable Input

Description The SK10/1000LVE111E is a low skew 1-to-9 differential driver designed with clock distribution in mind. The SK10/100LVE111E’s function and performance are similar to the SK100E111, with the added feature of low voltage operation. It accepts one signal input which can be either differe

文件：150.5 Kbytes 页数：6 Pages

SEMTECH

先之科

ECL/PECL 1:9 Differential Clock Driver

DESCRIPTION The AZ10/100LVE111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN signal is fanned-out to nine identical differential outputs. FEATURES • Operating Range of 3.0V to 5.5V • Low Skew • Guaranteed Skew Spec • Differential Design • VBB Out

文件：84.71 Kbytes 页数：6 Pages

AZM

ECL/PECL 1:9 Differential Clock Driver with Enable

DESCRIPTION The AZ10/100LVE111E is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN signal is fanned-out to nine identical differential outputs. An Enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q¯ outputs HIGH

文件：103.79 Kbytes 页数：6 Pages

AZM

ECL/PECL 1:9 Differential Clock Driver with Enable

DESCRIPTION The AZ10/100LVE111E is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN signal is fanned-out to nine identical differential outputs. An Enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q¯ outputs HIGH

文件：103.79 Kbytes 页数：6 Pages

AZM