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Si5324B-C-GM集成电路(IC)的应用特定时钟/定时规格书PDF中文资料

厂商型号 |
Si5324B-C-GM |
参数属性 | Si5324B-C-GM 封装/外壳为36-VFQFN 裸露焊盘;包装为管件;类别为集成电路(IC)的应用特定时钟/定时;产品描述:IC CLOCK MULT 2KHZ-808MHZ 36VQFN |
功能描述 | ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR |
封装外壳 | 36-VFQFN 裸露焊盘 |
文件大小 |
518.88 Kbytes |
页面数量 |
72 页 |
生产厂商 | SILABS |
中文名称 | 芯科科技 |
网址 | |
数据手册 | |
更新时间 | 2025-10-11 23:00:00 |
人工找货 | Si5324B-C-GM价格和库存,欢迎联系客服免费人工找货 |
Si5324B-C-GM规格书详情
描述 Description
The Si5324 is a low-bandwidth, jitter-attenuating, precision clock multiplier for applications requiring sub 1 ps jitter performance with loop bandwidths between 4 Hz and 525 Hz. The Si5324 accepts two input clocks ranging from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The two outputs are divided down separately from a common source. The Si5324 can also use its external reference as a clock source for frequency synthesis. The device provides virtually any frequency translation combination across this operating range. The Si5324 input clock frequency and clock multiplication ratio are programmable via an I2C or SPI interface. The Si5324 is based on Silicon Laboratories 3rd-generation DSPLL® technology, which provides any-frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and filter components. The DSPLL loop bandwidth is digitally programmable, providing jitter performance optimization at the application level. The Si5324 is ideal for providing clock multiplication and jitter attenuation in high performance timing applications.
特性 Features
■ Generates any frequency from
2 kHz to 945 MHz and select
frequencies to 1.4 GHz from an
input frequency of 2 kHz to 710 MHz
■ Ultra-low jitter clock outputs as low
as 290 fs rms (12 kHz–20 MHz), 320 fs rms (50 kHz–80 MHz)
■ Integrated loop filter with
selectable loop bandwidth (4– 525 Hz)
■ Meets ITU-T G.8251 and Telcordia
GR-253-CORE jitter specification
■ Hitless input clock switching with phase build-out
■ Freerun, Digital Hold operation
■ Configurable signal format per
output (LVPECL, LVDS, CML, CMOS)
■ Support for ITU G.709 and custom
FEC ratios (255/238, 255/237,
255/236, 239/237, 66/64, 239/238, 15/14, 253/221, 255/238)
■ LOL, LOS, FOS alarm outputs
■ I2C or SPI programmable
■ On-chip voltage regulator with high PSNR
■ Single supply 1.8 ±5, 2.5 ±10, or 3.3 V ±10
■ Small size: 6 x 6 mm 36-lead QFN
■ Pb-free, ROHS-compliant
Applications
■ Broadcast video –3G/HD/SD-SDI, Genlock
■ Packet Optical Transport Systems (P-OTS), MSPP
■ OTN/OTU-1/2/3/4 Asynchronous
Demapping (Gapped Clock)
■ SONET OC-48/192/768, SDH/STM-16/64/256 line cards
■ 1/2/4/8/10G Fibre Channel line cards
■ GbE/10/40/100G Synchronous Ethernet (LAN/WAN)
■ Data converter clocking
■ Wireless base stations
■ Test and measurement
产品属性
- 产品编号:
SI5324B-C-GM
- 制造商:
Skyworks Solutions Inc.
- 类别:
集成电路(IC) > 应用特定时钟/定时
- 系列:
DSPLL®
- 包装:
管件
- PLL:
是
- 主要用途:
以太网(WAN),SONET/SDH/STM,视频
- 输入:
时钟
- 输出:
CML,CMOS,LVDS,LVPECL
- 比率 - 输入:
2:2
- 差分 - 输入:
是/是
- 频率 - 最大值:
808MHz
- 电压 - 供电:
1.71V ~ 3.63V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
36-VFQFN 裸露焊盘
- 供应商器件封装:
36-QFN(6x6)
- 描述:
IC CLOCK MULT 2KHZ-808MHZ 36VQFN
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
SILICON LABS(芯科) |
24+ |
QFN36EP(6x6) |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
询价 | ||
SILICON LABS/芯科 |
22+ |
QFN |
100000 |
代理渠道/只做原装/可含税 |
询价 | ||
TI |
19+ |
QFN |
20 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
SILICON LABS(芯科) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
询价 | ||
SILICON/芯科 |
23+ |
QFN-36 |
6550 |
只做原装正品现货或订货!假一赔十! |
询价 | ||
Silicon Labs |
21+ |
- |
462 |
全新原装鄙视假货 |
询价 | ||
SILICON |
21+ |
QFN |
1609 |
只做原装,绝对现货,原厂代理商渠道,欢迎电话微信查 |
询价 | ||
Silicon |
24+ |
SMD |
5500 |
长期供应原装现货实单可谈 |
询价 | ||
SILICON LABS/芯科 |
21+ |
QFN |
20000 |
百域芯优势 实单必成 可开13点增值税发票 |
询价 | ||
Silicon |
23+ |
NA |
10019 |
专做原装正品,假一罚百! |
询价 |