19-OUTPUT PCIE GEN 3 BUFFER

Features  Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresses  SMBus address configurable to allow multiple buffers

文件：1.35006 Mbytes 页数：35 Pages

SKYWORKS

思佳讯

PLL or bypass mode

文件：1.4135 Mbytes 页数：34 Pages

SILABS

芯科科技

19-OUTPUT PCIE GEN 3 BUFFER

Features  Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresses  SMBus address configurable to allow multiple buffers

文件：1.35006 Mbytes 页数：35 Pages

SKYWORKS

思佳讯

PLL or bypass mode

文件：1.4135 Mbytes 页数：34 Pages

SILABS

芯科科技

Package：72-VFQFN 裸露焊盘；包装：管件 类别：集成电路（IC） 应用特定时钟/定时 描述：1:19 LOW-POWER PCIE FANOUT/ZERO-

SKYWORKS

思佳讯

Package：72-VFQFN 裸露焊盘；包装：卷带（TR） 类别：集成电路（IC） 应用特定时钟/定时 描述：1:19 LOW-POWER PCIE FANOUT/ZERO-

SKYWORKS

思佳讯