SH2-DSP中文资料瑞萨数据手册PDF规格书

▪ Instruction length: 16/32 bits

▪ Global register: 32 bits x 16,

Control register: 32 bits x 6,

System register: 32 bits x 4

▪ GR for DSP: 40 bits x 2, 32 bits x 6, CR for

DSP CR: 32 bits x 1

▪ Multiply-add calculation specification

− Internal bus: 32 bits-BUS x 1, 16 bits-

BUS x 2

− Multiply-accumulate instruction:

Integer: Single precision: 2-3 cycles,

double precision: 4-6 cycles, Fixed

Point: Single precision: 1 cycle