SGM65231数据手册SGMICRO中文资料规格书

描述 Description

The SGM65231 is an 8-Bit, low voltage and high bandwidth bus switch. It supports rail-to-rail switching on data I/O ports and the power supply range is designed from 2.3V to 3.6V.
The SGM65231 has low on-resistance (RON) and low data I/O capacitance. These features make the device allow for minimal propagation delay and minimize signal distortion on the data bus.
It is recommended to connect a pull-up resistor between the OE pin and VCC pin to ensure high impedance during power-on or power-off. The ability of the driver to absorb current can determine the minimum value of the resistor.
The SGM65231 is designed with an IOFF circuitry. When the device is powered down, the IOFF circuitry can effectively prevent the destructive current backflow, and the SGM65231 has an isolation function in the state of power-off. This feature is widely used in partial-power-down applications.
The SGM65231 is suitable in a variety of applications such as high bandwidth equipment, broadband communications and data-intensive computing systems.
The SGM65231 is available in Green TQFN-4.5×3.5-20L and TSSOP-20 packages. It operates over an operating temperature range of -40℃ to +125℃.

特性 Features

• Operating Voltage Range (VCC): 2.3V to 3.6V

• Data I/Os Support 0V to 5V Signaling Levels: 0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V

• Rail-to-Rail Switching on Data I/O Ports
0V to 5V Signal Passing, VCC = 3.3V
0V to 3.3V Signal Passing, VCC = 2.5V

• High Bandwidth Data Path

• Low On-Resistance (RON): 4.5Ω (TYP)

• Low Power Consumption (ICC): = 0.5mA (TYP)

• 5V Tolerant I/Os with Device Powered Up or Powered Down

• Bidirectional Data Flow

• Low Input/Output Capacitance Minimizes Loading and Signal Distortion

• Data and Control Inputs Provide Undershoot Clamp Diodes

• Control Input Can Be Driven by TTL or 5V/3.3V CMOS Outputs

• Support Partial-Power-Down Mode Operation

• Available in Green TQFN-4.5×3.5-20L and TSSOP-20 Packages

应用 Application

Differential Signal Interface
PCI Interface
Low Distortion Signal Gating
Memory Interleaving, Bus Isolation