SGM5102数据手册SGMICRO中文资料规格书

描述 Description

The SGM5102 is a 14-bit, 2 channels simultaneous sampling pipeline analog-to-digital converter (ADC). Its good DC and AC performances are designed for low power high-speed control application. 
It supports both oversampling and undersampling of IF frequencies. 
The SGM5102 offers series LVDS interface. Each ADC channel output can be shifted out by 2-lane mode (2 bits at a time) or 1-lane mode (1 bit at a time). The LVDS drivers have internal optional termination resistors and they are turned off by default.
The SGM5102 supports either differential or single-ended clock signal. Clock signals with PECL, TTL, CMOS or LVDS format can be provided to ENC+ and ENC- pins. The device has internal clock duty cycle stabilizer, which allows a wide range clock duty cycles and keeps high ADC performance at the same time. 
The SGM5102 is available in a Green TQFN-6×6-40AL package. It operates over an ambient temperature range -40℃ to +125℃.

特性 Features

• 2-Channel Simultaneous Sampling
• INL: ±1.5LSB (TYP), DNL: ±0.6LSB (TYP)
• Typical SNR: 71dB (TYP)
• Typical SFDR: 93dB (TYP)
• Low Power:
128mW (TYP) Total
64mW per Channel
• Single Supply: 1.8V
• Digital Outputs: Serial LVDS with 1 or 2 Bits per Channel
• Selectable Input Ranges: 1VP-P to 2VP-P
• Full Power Bandwidth S/H: 800MHz
• Sleep and Nap Modes
• Serial SPI Port for Configuration
• Available in a Green TQFN-6×6-40AL Package

应用 Application

Security Monitoring Equipment
Communication Systems
Medical Imaging Systems
Testing and Measurement Instruments