Timer

DESCRIPTION The 555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free ru

文件：120.19 Kbytes 页数：7 Pages

PHI

PHI

Timer

DESCRIPTION The 555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free ru

文件：120.19 Kbytes 页数：7 Pages

PHI

PHI

LOW POWER SINGLE CMOS TIMERS

DESCRIPTION The TS555 is a single CMOS timer which offers very low consumption (Icc(TYP) TS555 = 100µA Icc(TYP) NE555 = 3mA) and high frequency (f(max.) TS555 = 2.7MHz - f(max.) NE555 = 0.1 MHz) Thus, either in Monostable or Astable mode, timing remains very accurate. The TS555provides reduced s

文件：84.87 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

LOW POWER SINGLE CMOS TIMERS

DESCRIPTION The TS555 is a single CMOS timer which offers very low consumption (Icc(TYP) TS555 = 100µA Icc(TYP) NE555 = 3mA) and high frequency (f(max.) TS555 = 2.7MHz - f(max.) NE555 = 0.1 MHz) Thus, either in Monostable or Astable mode, timing remains very accurate. The TS555provides reduced s

文件：84.87 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体