丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器

丝印：SCAN926260TUF；Package：NFBGA；SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST

1FEATURES 2• Deserializes One to Six Bus LVDS Input Serial Data Streams with Embedded Clocks • IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes • Parallel Clock Rate 16-66MHz • On Chip Filtering for PLL • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3

文件：813.42 Kbytes 页数：26 Pages

TI

德州仪器