SAA7109A中文资料飞利浦数据手册PDF规格书

GENERAL DESCRIPTION

The SAA7108AE; SAA7109AE is a new multi-standard video decoder and encoder chip, offering high quality video input and TV output processing as required by PC-99 specifications. It enables hardware manufacturers to implement versatile video functions on a significantly reduced printed-circuit board area at very competitive costs.

FEATURES

Video decoder

• Six analog inputs, internal analog source selectors, e.g.

6 × CVBS or (2 × Y/C and 2 × CVBS) or (1 × Y/C and

4 × CVBS)

• Two analog preprocessing channels in differential

CMOS style for best S/N performance

• Fully programmable static gain or Automatic Gain

Control (AGC) for the selected CVBS or Y/C channel

• Switchable white peak control

• Two built-in analog anti-aliasing filters

• Two 9-bit video CMOS Analog-to-Digital Converters

(ADCs), digitized CVBS or Y/C signals are available on

the Image Port Data (IPD) port under I2C-bus control

• On-chip clock generator

• Line-locked system clock frequencies

• Digital PLL for horizontal sync processing and clock

generation, horizontal and vertical sync detection

• Requires only one crystal (either 24.576 MHz or

32.11 MHz) for all standards

• Automatic detection of 50 and 60 Hz field frequency,

and automatic switching between PAL and NTSC

standards

• Luminance and chrominance signal processing for

PAL BGHI, PAL N, combination PAL N, PAL M,

NTSC M, NTSC-Japan, NTSC N, NTSC 4.43 and

SECAM

• User programmable luminance peaking or aperture

correction

• Cross-colour reduction for NTSC by chrominance comb

filtering

• PAL delay line for correcting PAL phase errors

• Brightness Contrast Saturation (BCS) and hue control

on-chip

• Two multi functional real-time output pins controlled by

the I2C-bus

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