SAA6579T中文资料飞利浦数据手册PDF规格书

GENERAL DESCRIPTION

The integrated CMOS circuit SAA6579 is an RDS demodulator. It recovers the additional inaudible RDS

information which is transmitted by FM radio broadcasting.

The data signal RDDA and the clock signal RDCL are provided as outputs for further processing by a suitable

decoder (microcomputer).

FEATURES

• Anti-aliasing filter (2nd order)

• Integrated 57 kHz band-pass filter (8th order)

• Reconstruction filter (2nd order)

• Clocked comparator with automatic offset compensation

• 57 kHz carrier regeneration

• Synchronous demodulator for 57 kHz modulated RDS signals

• Selectable 4.332/8.664 MHz crystal oscillator with variable dividers

• Clock regeneration with lock on biphase data rate

• Biphase symbol decoder with integrate and dump functions

• Differential decoder

• Signal quality detector

• Subcarrier output.