VPS dataline processor

GENERAL DESCRIPTION The SAA4700 is a bipolar integrated circuit designed for use in dataline receivers and incorporates a dataline slicer and decoder. The slicer extracts the dataline signal from the video signal and regenerates the data clock. It also provides signals for the decoder in order to

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PHI

VPS dataline processor

GENERAL DESCRIPTION\nThe SAA4700 is a bipolar integrated circuit designed for use in dataline receivers and incorporates a dataline slicer and decoder. The slicer extracts the dataline signal from the video signal and regenerates the data clock. It also provides signals for the decoder in order to d • Adaptive sync slicer with buffered composite sync output VCS\n• Adaptive data slicer\n• Data rate clock regenerator\n• Field selection and line 16 decoding\n• Startcode and biphase check\n• Data valid output\n• Storage of data line information in a 40 bit register bank\n• I2C-bus transmission;

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VPS dataline processor

GENERAL DESCRIPTION The SAA4700T is a bipolar integrated circuit designed for use in dataline receivers and incorporates a dataline slicer and decoder. The slicer extracts the dataline signal from the video signal and regenerates the data clock. It also provides signals for the decoder in order t

文件：80.12 Kbytes 页数：14 Pages

PHI

PHI

VPS dataline processor

GENERAL DESCRIPTION\nThe SAA4700T is a bipolar integrated circuit designed for use in dataline receivers and incorporates a dataline slicer and decoder. The slicer extracts the dataline signal from the video signal and regenerates the data clock. It also provides signals for the decoder in order to • Adaptive sync slicer with buffered composite sync output VCS\n• Adaptive data slicer\n• Data rate clock regenerator\n• Field selection and line 16 decoding\n• Startcode and biphase check\n• Data valid output\n• Storage of data line information in a 40 bit register bank\n• I2C-bus transmission;

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