S70GL01GN00FFI013中文资料飞索数据手册PDF规格书

General Description

The S70GL01GN00 is a 1024 Mbit, single power supply flash memory device organized as two S29GL512N dies in a single 64-ball Fortified-BGA package. Each S29GL512N die is 512 Mbit, organized as 33,554,432 words or 67,108,864 bytes. The devices have a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The device can be programmed either in the host system or in standard EPROM programmers.

Distinctive Characteristics

Architectural Advantages

■ Two 512 Megabit (S29GL512N) in a single 64-ball Fortified-BGA package

■ Two Chip Enable pins

— Two CE# pins to control selection of each internal

S29GL512N devices

■ Single power supply operation

— 3 volt read, erase, and program operations

■ Manufactured on 110 nm MirrorBit process technology

■ Secured Silicon Sector region

— 128-word/256-byte sector for permanent, secure

identification through an 8-word/16-byte random

Electronic Serial Number, accessible through a

command sequence

■ Flexible sector architecture

— Each internal S29GL512N device has five

hundred-twelve 64Kword (128Kbyte) sector

■ Compatibility with JEDEC standards

— Provides pinout and software compatibility for

single-power supply flash, and superior inadvertent write

protection

■ 100,000 erase cycles per sector typical

■ 20-year data retention typical

Performance Characteristics

■ High performance

— 110 ns (S29GL512N)

— 8-word/16-byte page read buffer

— 25 ns page read times

— 16-word/32-byte write buffer reduces overall

programming time for multiple-word updates

■ Low power consumption (typical values at 3.0 V, 5 MHz)

— 25 mA typical active read current;

— 50 mA typical erase/program current

— 1 µA typical standby mode current

■ Package options

— 64-ball Fortified BGA

Software & Hardware Features

■ Software features

— Program Suspend and Resume: read other sectors

before programming operation is completed

— Erase Suspend and Resume: read/program other

sectors before an erase operation is completed

— Data# polling and toggle bits provide status

— Unlock Bypass Program command reduces overall

multiple-word programming time

— CFI (Common Flash Interface) compliant: allows host

system to identify and accommodate multiple flash

devices

■ Hardware features

— Advanced Sector Protection

— WP#/ACC input accelerates programming time

(when high voltage is applied) for greater throughput

during system production. Protects first or last sector

regardless of sector protection settings

— Hardware reset input (RESET#) resets device

— Ready/Busy# output (RY/BY#) detects program or

erase cycle completion