S56F8365W0MFGE数据手册恩XP中文资料规格书

描述 Description

NXP® 56F836X and 56F816X digital signal controllers belong to the 56800E core-based DSC family. They combine digital signal processing and microcontroller functionalities on a single chip, with a flexible set of peripherals.
On-chip integration and ease of implementation help to speed development, lower component count, and significantly reduce system cost
Simplifies designs while promoting compliance with safety regulations
Supported by robust development tools to simplify and accelerate time-to-market

特性 Features

• On-chip memory includes high-speed volatile and nonvolatile components:
• 512 KB of program Flash
• 4 KB of program RAM (836X devices)
• 32 KB of data RAM
• 32 KB of data Flash (836X devices)
• 32 KB of boot Flash
• Access up to 4 MB of off-chip program and 32 MB of data memory
• Up to 60 MIPS at 60 MHz execution frequency
• Chip select logic for glueless interface to ROM and SRAM
• JTAG/EOnCE for unobtrusive real-time debugging
• Four 12-bit ADCs
• Temperature sensor
• Up to two FlexCAN (CAN Version 2.0 B-compliant)
• Two serial communication interfaces (SCIs)
• Up to two serial peripheral interfaces (SPIs)
• Two dedicated external interrupt pins
• Software-programmable phase-lock loop
• Up to 76 GPIO pins

应用 Application

Motor Control
•Brushless DC (BLDC) Motor
•Permanent Magnet Synchronous Motor