S3076DI中文资料etc未分类制造商数据手册PDF规格书

[Applied Micro Circuits Corporation]

GENERAL DESCRIPTION

The function of the S3076 clock recovery unit is to derive high speed timing signals for SONET/SDHbased equipment. The S3076 is implemented using AMCC’s proven Phase Locked Loop (PLL) technology. Figure 1 shows a typical network application.

FEATURES

• SiGe BiCMOS technology

• Complies with Bellcore and ITU-T specifications for jitter tolerance, jitter transfer and

jitter generation

• On-chip high frequency PLL with internal

loop filter for clock recovery

• Supports clock recovery for:

OC-48 (2488.32 Mbps) (with FEC)

Fibre Channel (2125 Mbps) (with FEC)

OC-24 (1244.16 Mbps) (with FEC)

Gigabit Ethernet (1250 Mbps) (with FEC)

Fibre Channel (1062.5 Mbps) (with FEC)

OC-12 (622.08 Mbps) (with FEC)

OC-3 (155.52 Mbps) (with FEC) NRZ data

• Selectable reference frequencies

19.44 MHz or 155.52 MHz

(or equivalent Fibre Channel/

Gigabit Ethernet frequencies)

• Lock detect—monitors frequency of

incoming data

• Low-jitter serial interface

• +3.3 V supply

• Compact 48 pin TQFP TEP package

• Typical power 620 mW

• Available in Die form also