S29JL064J70THI003中文资料赛普拉斯数据手册PDF规格书

Software Features

 Supports Common Flash Memory Interface (CFI)

 Erase suspend/erase resume

– Suspends erase operations to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

 Data# polling and toggle bits

– Provides a software method of detecting the status of program or erase operations

 Unlock bypass program command

– Reduces overall programming time when issuing multiple program command sequences

Hardware Features

 Ready/Busy# output (RY/BY#)

– Hardware method for detecting program or erase cycle completion

 Hardware reset pin (RESET#)

– Hardware method of resetting the internal state machine to the read mode

 WP#/ACC input pin

– Write protect (WP#) function protects sectors 0, 1, 140, and 141, regardless of sector protect status

– Acceleration (ACC) function accelerates program timing

 Sector Protection

– Hardware method to prevent any program or erase operation within a sector

– Temporary Sector Unprotect allows changing data in protected sectors in-system

General Description

The S29JL064J is a 64 Mbit, 3.0 volt-only flash memory device, organized as 4,194,304 words of 16 bits each or 8,388,608 bytes of 8 bits each. Word mode data appears on DQ15–DQ0; byte mode data appears on DQ7–DQ0. The device is designed to be programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers. The device is available with an access time of 55, 60, 70 ns and is offered in a 48-ball FBGA or 48-pin TSOP package. Standard control pins—chip enable (CE#), write enable (WE#), and output enable (OE#)—control normal read and write operations, and avoid bus contention issues. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.