Q67100-Q3016中文资料西门子数据手册PDF规格书

Advanced Information

• 4 194 304 words by 36-Bit organization

• Fast access and cycle time

60 ns RAS access time

15 ns CAS access time

104 ns cycle time

• Hyper page mode (EDO) capability

25 ns cycle time

• Single + 5 V (± 10 ) supply

• Low power dissipation

max. 7260 mW active

CMOS – 66 mW standby

TTL – 132 mW standby

• CAS-before-RAS refresh

RAS-only-refresh

Hidden-refresh

• 12 decoupling capacitors mounted on substrate

• All inputs, outputs and clocks fully TTL compatible

• 72 pin Single in-Line Memory Module (L-SIM-72) with 22.9 mm (900 mil) height

• Utilizes 12 4M x 3 DRAM’s in 300 mil SOJ packages

• 2048 refresh cycles / 32 ms

• Optimized for use in byte-write parity applications

• Tin-Lead contact pads (HYM 364035S-60)

• Gold contact pads (HYM 364035GS-60)