首页>PZ3032I12A44>规格书详情

PZ3032I12A44中文资料飞利浦数据手册PDF规格书

PZ3032I12A44
厂商型号

PZ3032I12A44

功能描述

32 macrocell CPLD

文件大小

116.38 Kbytes

页面数量

14

生产厂商 Philips Semiconductors
企业简称

PHI飞利浦

中文名称

荷兰皇家飞利浦

数据手册

下载地址一下载地址二

更新时间

2025-6-13 22:30:00

人工找货

PZ3032I12A44价格和库存,欢迎联系客服免费人工找货

PZ3032I12A44规格书详情

DESCRIPTION

The PZ3032 CPLD (Complex Programmable Logic Device) is the first in a family of Fast Zero Power (FZP™) CPLDs from Philips Semiconductors. These devices combine high speed and zero power in a 32 macrocell CPLD. With the FZP design technique, the PZ3032 offers true pin-to-pin speeds of 8ns, while simultaneously delivering power that is less than 35µA at standby without the need for ‘turbo bits’ or other power down schemes. By replacing conventional sense amplifier methods for implementing product terms (a technique that has been used in PLDs since the bipolar era) with a cascaded chain of pure CMOS gates, the dynamic power is also substantially lower than any competing CPLD – 70 lower at 50MHz.

FEATURES

• Industry’s first TotalCMOS™ PLD – both CMOS design and process technologies

• Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed

• High speed pin-to-pin delays of 8ns

• Ultra-low static power of less than 35µA

• Dynamic power that is 70 lower at 50MHz than competing devices

• 100 routable with 100 utilization while all pins and all macrocells are fixed

• Deterministic timing model that is extremely simple to use

• 2 clocks with programmable polarity at every macrocell

• Support for complex asynchronous clocking

• Innovative XPLA™ architecture combines high speed with extreme flexibility

• 1000 erase/program cycles guaranteed

• 20 years data retention guaranteed

• Logic expandable to 37 product terms

• PCI compliant

• Advanced 0.5µ E2CMOS process

• Security bit prevents unauthorized access

• Design entry and verification using industry standard and Philips CAE tools

• Reprogrammable using industry standard device programmers

• Innovative Control Term structure provides either sum terms or product terms in each logic block for:

– Programmable 3-State buffer

– Asynchronous macrocell register preset/reset

• Programmable global 3-State pin facilitates ‘bed of nails’ testing without using logic resources

• Available in both PLCC and TQFP packages

产品属性

  • 型号:

    PZ3032I12A44

  • 功能描述:

    Electrically-Erasable Complex PLD

供应商 型号 品牌 批号 封装 库存 备注 价格
PIHLIPS
24+
QFP44
80000
只做自己库存,全新原装进口正品假一赔百,可开13%增
询价
PIHLIPS
00+
QFP44
9820
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
PHI
24+
QFP
3000
只做原装正品现货 欢迎来电查询15919825718
询价
PHI
16+
TQFP
985
进口原装现货/价格优势!
询价
PHI
23+
PLCC84
1004
特价库存
询价
PHI
23+
QFP
4500
全新原装、诚信经营、公司现货销售!
询价
PHI
23+
PLCC44
12300
询价
PHI
23+
QFP
5700
绝对全新原装!现货!特价!请放心订购!
询价
23+
QFP44
11200
原厂授权一级代理、全球订货优势渠道、可提供一站式BO
询价
24+
3000
公司存货
询价