PXS20中文资料Functional Safety MCU module数据手册恩XP规格书

描述 Description

Overview The PXS20 family of 32-bit Power Architecture® microcontrollers targets industrial applications which require compliance with IEC 61508 (SIL 3) safety standard. It reduces design complexity and component count by putting key functional safety features on a single chip with a dual-core, dual-issue architecture, which can be statically switched between lockstep mode (redundant processing and calculations) to decoupled parallel mode (independent core operation). The PXS20 microcontrollers are SafeAssure® functional safety solutions.
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特性 Features

•Dual e200z4 CPU architecture

•Dual processing spheres including: CPU, DMA, interrupt controller, crossbar and MPU for logic level fault detection

•Two statically configurable modes of operation:
•Lockstep operation (redundant processing and calculations)

•Dual Parallel Mode (independent core operation)


•Fault Collection Unit, which monitors and manages fault events

•Error correction coding on RAM and flash memory allows detection/correction of memory errors

•Designed to address safety requirements outlined in IEC61511 and IEC61508 (SIL3)

•Robust communications CAN/safety port high speed low latency messaging

•Cross-triggering unit coordinates ADC, timer and PWM generation and minimizes CPU interrupt load

•Integrated timer and analog peripherals:
•Supporting precise control of integrated electric motor control periphery

•Enabling the device to control of up to two brushless 3-phase motors or multiple valves with only minimum interrupt load