PT7C4512数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

特性 Features

Zero ppm multiplication error
Input crystal frequency of 5 - 40 MHz
Input clock frequency of 4 - 50 MHz
Output clock frequencies up to 200 MHz
Low period jitter 80ps (100~200MHz)
Duty cycle of 45/55% of output clock up to 160MHz

9 selectable frequencies controlled by S0, S1 pins


Operating voltages of 3.0 to 5.5V


Lead free SOIC-8 package