PT7C4050ADE中文资料百利通数据手册PDF规格书

描述 Description

The device is composed of phase-lock loop with integrated VCXO for use in clock recovery, data retiming, frequency translation and clock smoothing applications in telecom and datacom systems.

特性 Features

• PLL with quartz stabilized VCXO

• Crystal output jitter less than 20ps

• Dual redundant reference input clocks with loss of signal detection

• Manual or automatic switch over between reference input clocks

• VCXO provides smooth output transition during switch over of input clocks

• Lock detection

• Selectable metal mask options for phase detectors, op. Amps, and charge pump

• Loss of signals alarm

• Return to nominal clock upon LOS

• Input data rates from 8 kb/s to 40 Mb/s

• Tri-state output

• User defined PLL loop response

• NRZ data compatible

• +3.3 and +5.0V supply voltage

Applications

• Frequency translation

• Clock Smoothing, Clock Switching

• NRZ Clock Recovery

• Optical Switching/Routing, Base Station