74HC595D供应代理商NXPPDF规格书SOP14The74HC595;74HCT59

原厂料号：74HC595D品牌：NXP

The 74HC595; 74HCT595 are high-speed Si-gate CMOS devices are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC stard No. 7A.

The 74HC595; 74HCT595 are 8-stage serial shift registers with a stage register 3-state outputs. The registers have separate clocks.

Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each register is transferred to the stage register on a positive-going transition of the stage register clock input (STCP). If both clocks are connected together, the shift register will always be one clock pulse ahead of the stage register.

The shift register has a serial input (DS) a serial stard output (Q7S) f cading. It is also provided with asynchronous reset (active LOW) f all 8 shift register stages. The stage register has 8 parallel 3-state bus driver outputs. Data in the stage register appears at the output whenever the output enable input (OE) is LOW.

Features benefits

8-bit serial input

8-bit serial parallel output

Stage register with 3-state outputs

Shift register with direct clear

100 MHz (typical) shift out frequency

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Multiple package options

Specified from -40 ℃ to +85 ℃ from -40 ℃ to +125 ℃

• 芯片型号：

  74HC595D

• 规格书：

  下载

• 企业简称：

  NXP【恩智浦】详情

• 厂商全称：

  NXP Semiconductors

• 中文名称：

  恩智浦半导体公司

• 内容页数：

  24 页

• 文件大小：

  374.02 kb

• 资料说明：

  8-bit serial-in, serial or parallel-out shift register with output latches; 3-state