PN7642EVSLASHC101中文资料恩智浦数据手册PDF规格书

Features and benefits

Arm Cortex-M33 microcontroller

• Running at a frequency of up to 90 MHz

• Arm Cortex M33 built-in nested vectored interrupt controller (NVIC)

• Non-maskable interrupt (NMI) input with a selection of sources

• Serial wire debug with breakpoints and watch points. Includes serial wire output for enhanced debug

capabilities.

• System tick timer

• up to 21 GPIOs (6 dedicated GPIOs)

• On-chip memory

– 256 kB flash memory (180 kB available to the user)

– 32 kB RAM (20 kB available to the user)

• Security

– Symmetric crypto accelerator

– Asymmetric crypto accelerator

– Secure key storage for symmetric keys

– Refer to Section 9.12.3 for information about how to replace the factory default keys with custom keys

– Secure boot support

– Key transfer unit to transfer symmetric keys between key store and crypto engine, without involvement of

the CPU

• Serial interfaces

– I2C controller 1

– SPI controller

– USB 2.0 Full-speed device controller

– I2C target up to 3.4 Mbit/s (High-speed mode)

– I3C target

– SPI target up to 15 Mbit/s

– UART

– CT auxiliary interface

– Host interface supply voltage of 1.8 V and 3.3 V is supported for maximum interoperability with existing

micro-controllers

NFC functionality

• The following 13.56 MHz reader/writer modes (PCD) are supported

– ISO14443-3/4 A/B

– ISO15693 / ISO18000-3 mode 1

– FeliCa

– ISO18000-3 mode 3

• The following 13.56 MHz card modes (PICC) are supported

– ISO14443-3/4A

• Supports ECP 2.0 (ref. [1])

• All relevant 13.56 MHz reader/writer modes (PCD) are supported

• High data rates for communication with NTAG 5 (based on ISO/IEC15693) up to 212 kbit/s

• Fast hardware and firmware-based EMD error handling without host controller interaction

Transmitter

• 2.0 W transmitter output power

• Dynamic power control (DPC 2.0) works with true current measurement

• DPC 2.0 regulates the transmitter current with lowest latency and without any host controller interaction

• Fine granularity of DPC 2.0 transmitter output voltage settings, step-width is 100 mV

• Adaptive waveform control (AWC) reduces the effort to achieve the standard compliance for various data

rates and protocols

Receiver

• Innovative receiver signal processing implemented for advanced robustness against external noise sources

(e.g. TFT display and external DC-DC noise)

• True automatic gain control (AGC) and internal voltage divider adjust signal levels automatically for optimized

signal to noise ratio

• 10-bit ADC - together with the innovative signal processing delivers high receiver sensitivity and wide

communication range

• Receiver signal strength indicator (RSSI) allows configuring receiver settings automatically dependent on the

actual antenna signal reception condition.

Power-saving support

• Comprehensive power-saving configurations allow for minimizing the power consumption including standby,

OFF mode and hard power down (HPD) mode.

• Software-based low-power card detection (LPCD) for highest detection sensitivity

• Hardware-based ultra low-power card detection (ULPCD) for lowest current consumption

Special features

• Integrated low noise DC-DC allows supplying the transmitter with up to 6.0 V while the system supply is 3.3 V

(e.g. battery supply).

• Internal temperature sensor protects against overheating, warning levels are configurable, emergency

shutdown at temperature level which might impact product lifetime.

• Overcurrent protection (configurable) protects the chip in case of short on the transmitter outputs

• Two DAC outputs allow the connection of variable capacitors for automatic antenna tuning

• Firmware upgrade is possible in the field

• Operating ambient temperature range -40 °C to +85 °C with full RF output power

• Operating ambient temperature from +85 °C to +105 °C is possible with reduced RF output power

2.1 RF functionality

• As a highly integrated high performance full NFC Forum-compliant frontend IC for contactless communication

at 13.56 MHz, this NFC frontend IC utilizes an outstanding modulation and demodulation concept completely

integrated for relevant 13.56 MHz based contactless communication methods and protocols.

PN7642 supports communication with all products of the MIFARE product-based card family including

MIFARE Ultralight, MIFARE Classic 1K/4K, MIFARE DESFire EV1/EV2 and MIFARE Plus cards CRYPTO

implemented in hardware for R/W of all NXP MIFARE product-based cards (includes intellectual-property

licensing rights for NXP ISO/IEC 14443-A, Innovatron ISO/IEC 14443-B, and NXP MIFARE products).

The PN7642 frontend IC supports the following RF operating modes:

2.1.1 ISO/IEC14443-A

• Reader/writer mode supporting ISO/IEC 14443-A R/W up to 848 kbit/s

2.1.2 ISO/IEC14443-B

• Reader/writer mode supporting ISO/IEC 14443-B up to 848 kBit/s

2.1.3 FeliCa

• Reader/writer mode supporting FeliCa 212 kBit/s and 424 kBit/s (without crypto)

2.1.4 Tag type reading

• Supports reading of all NFC tag types (type 1, type 2, type 3, type 4A and type 4B, type 5)

2.1.5 MIFARE card reading

• Reader/writer communication mode for the MIFARE card family including MIFARE Classic

2.1.6 ISO/IEC 15693

• Reader/writer mode supporting ISO/IEC 15693 (ICODE)

• Proprietary data rates based on ISO/IEC15693 with 106 kbit and 212 kbit/s (for NXP NTAG 5 communication)

2.1.7 ISO/IEC 18000-3 Mode 3

• Reader/writer mode supporting ISO/IEC 18000-3 Mode 3

2.1.8 Card emulation

• ISO/IEC4443-A card mode from 106 Kbit/s up to 848 Kbit/s (PICC) with active load modulation for increased communication range.

2.2 Product Features

The PN7642 features in nutshell.

Applications

• Physical access

• eGov

• Closed loop payment

• Secure authentication

• Enhanced Contactless Polling (ECP)