32 LINK CES/DBCES AAL1 SAR PROCESSOR

DESCRIPTION The AAL1 Segmentation And Reassembly (SAR) Processor (AAL1gator-32) is a monolithic single chip device that provides DS1, E1, E3, or DS3 line interface access to an ATM Adaptation Layer One (AAL1) Constant Bit Rate (CBR) ATM network. It arbitrates access to an external SRAM for storag

文件：4.41617 Mbytes 页数：489 Pages

PMC

32 LINK CES/DBCES AAL1 SAR PROCESSOR

DESCRIPTION The AAL1 Segmentation And Reassembly (SAR) Processor (AAL1gator-32) is a monolithic single chip device that provides DS1, E1, E3, or DS3 line interface access to an ATM Adaptation Layer One (AAL1) Constant Bit Rate (CBR) ATM network. It arbitrates access to an external SRAM for storag

文件：4.41617 Mbytes 页数：489 Pages

PMC

32 LINK CES/DBCES AAL1 SAR PROCESSOR

PMC-Sierra

BGA

PMC

上传：深圳市卓越微芯电子有限公司

BGA

PMC

上传：深圳市福安瓯科技有限公司