PM5384集成电路（IC）的电信规格书PDF中文资料

FEATURES

• Single chip ATM and Packet over SONET/SDH Physical Layer Device operating at 155.52 Mbit/s.

• Implements the ATM Forum User Network Interface (UNI) and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432.

• Implements Point-to-Point Protocol (PPP) over SONET/SDH according to RFC 2615.

• Processes duplex bit-serial 155.52 Mbit/s STS-3c/STM-1 data streams with on-chip clock and data recovery and clock synthesis.

• Complies with Bellcore GR-253-CORE (1995 Issue) jitter tolerance, jitter transfer and intrinsic jitter criteria.

• Provides control circuitry required to comply with Bellcore GR-253-CORE WAN clocking requirements related to wander transfer, holdover and long term stability when using an external VCXO.

• Provides a UTOPIA Level 2, 8-bit wide system interface (clocked up to 52 MHz) with parity support for ATM applications.

• Provides a UTOPIA Level 2, 16-bit wide system interface (clocked up to 52 MHz) with parity support for ATM applications.

• Provides a SATURN POS-PHY Level 2, 16-bit system interface (clocked up to 52 MHz) for Packet over SONET/SDH (POS) applications (similar to UTOPIA Level 2, but adapted for packet transfer).

• Provides support functions for 1+1 APS operation.

APPLICATIONS

• Routers and Layer 3 Switches.

• 3G Wireless Base Station Controllers.

• DSLAM Uplinks.

• WAN and Edge ATM switches.

• LAN switches and hubs.

• Packet switches and hubs.

• Network Interface Cards and Uplinks.