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PLS173N中文资料Programmable logic array (22 × 42 × 10)数据手册恩XP规格书

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厂商型号

PLS173N

功能描述

Programmable logic array (22 × 42 × 10)

制造商

恩XP

中文名称

N智浦

数据手册

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更新时间

2025-9-24 15:19:00

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PLS173N规格书详情

描述 Description

DESCRIPTION
The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and
10 bidirectional I/O lines (B). These yield variable I/O gate configurations via 10 direction control gates (D), ranging from 22 inputs to 10 outputs.FEATURES
• I/O propagation delay: 30ns (max.)
• 12 inputs
• 42 AND gates
• 10 OR gates
• 10 bidirectional I/O lines
• Active-High or -Low outputs
• 42 product terms:
– 32 logic terms
– 10 control terms
• Ni-Cr programmable links
• Input loading: –100µA (max.)
• Power dissipation: 750mW (typ.)
• 3-State outputs
• TTL compatibleAPPLICATIONS
• Random logic
• Code converters
• Fault detectors
• Function generators
• Address mapping
• Multiplexing

特性 Features

• I/O propagation delay: 30ns (max.)
• 12 inputs
• 42 AND gates
• 10 OR gates
• 10 bidirectional I/O lines
• Active-High or -Low outputs
• 42 product terms:
– 32 logic terms
– 10 control terms
• Ni-Cr programmable links
• Input loading: –100µA (max.)
• Power dissipation: 750mW (typ.)
• 3-State outputs
• TTL compatible

技术参数

  • 型号:

    PLS173N

  • 功能描述:

    Fuse-Programmable PLD

供应商 型号 品牌 批号 封装 库存 备注 价格
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22+
CDIP-24
14008
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18+
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22+
DIP24
3000
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2023+
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50000
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90
5
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24+
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