LMKDB1120 and LMKDB1108 Ultra-Low Jitter PCIe Gen 1 to Gen 6 LP-HCSL Clock Buffers

1 Features • LP-HCSL clock buffer that support: – PCIe Gen 1 to Gen 6 – CC (Common Clock) and IR (Independent Reference) PCIe architectures – Input clock with or without SSC • DB2000QL compliant: – All devices meet DB2000QL specifications – LMKDB1120 is pin-compatible to DB2000QL • Extrem

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TI

德州仪器

LMKDB1120 and LMKDB1108 Ultra-Low Jitter PCIe Gen 1 to Gen 6 LP-HCSL Clock Buffers

1 Features • LP-HCSL clock buffer that support: – PCIe Gen 1 to Gen 6 – CC (Common Clock) and IR (Independent Reference) PCIe architectures – Input clock with or without SSC • DB2000QL compliant: – All devices meet DB2000QL specifications – LMKDB1120 is pin-compatible to DB2000QL • Extrem

文件：2.44943 Mbytes 页数：64 Pages

TI

德州仪器

LMKDB1xxx PCIe Gen 1 to Gen 6 Ultra Low Jitter 1:20, 1:8, 1:4, 1:2, 2:4, 2:2 LP-HCSL Clock Buffer and Clock MUX

1 Features • LP-HCSL clock buffer and clock MUX that support: – PCIe Gen 1 to Gen 6 – CC (Common Clock) and IR (Independent Reference) PCIe architectures – Input clock with or without SSC • DB2000QL compliant: – All devices meet DB2000QL specifications – LMKDB1120 is pin-compatible to DB20

文件：3.03719 Mbytes 页数：77 Pages

TI

德州仪器

STEERING DIODE ARRAY

FEATURES ✔ 500 Milliwatt Continuous Power Dissipation ✔ ESD Protection > 40 kilovolts ✔ Monolithic Design ✔ Provides Protection for 8 I/O Lines ✔ Working Voltage > 50 Volts ✔ Low Leakage Current

文件：68.43 Kbytes 页数：3 Pages

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ultra low capacitance multi-line steering diode array

文件：501.3 Kbytes 页数：4 Pages

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STEERING DIODE ARRAY

DescRiPtion The PMAD1108 is a low distortion steering diode. This device is intended for use in high frequency analog or digital data I/O ports for protection against Electrostatic Discharge (ESD) and Electrical Fast Transients (EFT). The PMAD1108 is connected between rail-to-rail voltage bus or

文件：182.04 Kbytes 页数：3 Pages

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