DDR SDRAM Buffer with 2 DDR or 3 SDRAM DIMMS

DESCRIPTIONS The PLL103-06 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 12 outputs. These outputs can be configured to support 3 unbuffered standard SDR (Single Data Rate) DIMMS and 2 DDR DIMMS. The PLL103-06 can be used in conjunction with

文件：145.87 Kbytes 页数：7 Pages

PLL

DDR SDRAM Buffer with 2 DDR or 3 SDRAM DIMMS

PLL

DDR SDRAM Buffer with 2 DDR or 3 SDRAM DIMMS

DESCRIPTIONS The PLL103-06 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 12 outputs. These outputs can be configured to support 3 unbuffered standard SDR (Single Data Rate) DIMMS and 2 DDR DIMMS. The PLL103-06 can be used in conjunction with

文件：145.87 Kbytes 页数：7 Pages

PLL

DDR SDRAM Buffer with 2 DDR or 3 SDRAM DIMMS

DESCRIPTIONS The PLL103-06 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 12 outputs. These outputs can be configured to support 3 unbuffered standard SDR (Single Data Rate) DIMMS and 2 DDR DIMMS. The PLL103-06 can be used in conjunction with

文件：145.87 Kbytes 页数：7 Pages

PLL

DDR SDRAM Buffer with 2 DDR or 3 SDRAM DIMMS

DESCRIPTIONS The PLL103-06 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 12 outputs. These outputs can be configured to support 3 unbuffered standard SDR (Single Data Rate) DIMMS and 2 DDR DIMMS. The PLL103-06 can be used in conjunction with

文件：145.87 Kbytes 页数：7 Pages

PLL