PLHS501A中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The PLHS501 is a high-density Bipolar Programmable Macro Logic device. PML incorporates a programmable NAND structure. The NAND architecture is an efficient method for implementing any logic function. The SNAP software development system provides a user friendly environment for design entry. SNAP eliminates the need for a detailed understanding of the PLHS501 architecture and makes it transparent to the user. PLHS501 is also supported on the Philips Semiconductors SNAP software development systems.

FEATURES

• Programmable Macro Logic device

• Full connectivity

• TTL compatible

• SNAP development system:

– Supports third-party schematic entry formats

– Macro library

– Versatile netlist format for design portability

– Logic, timing, and fault simulation

• Delay per internal NAND function = 6.5ns (typ)

• Testable in unprogrammed state

• Security fuse allows protection of proprietary designs