PL620-88中文资料Low Phase Noise XO数据手册Microchip规格书

描述 Description

The PL620-88 (LVPECL) and PL620-89 (LVDS) are XO ICs specifically designed to work with fundamental or 3rd OT crystals between 19MHz and 65MHz.The selectable divide by two feature extends the output range from 9.5MHz to 65MHz. They require very low current into the crystal resulting in better overall stability.

特性 Features

• 19MHz to 65MHz Crystal input
• Output range: 9.5MHz – 65MHz
• Very low phase noise and jitter
• Complementary outputs
• LVPECL (PL620-88)
• LVDS (PL620-89)
• Supports 2.5V or 3.3V Power Supply
• Available in 16 pin TSSOP GREEN/RoHS compliant package

简介

PL620-88属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的PL620-88时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。