PIC18LF65K40中文资料微芯科技数据手册PDF规格书

描述 Description

PIC18(L)F67K40 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals,

combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications.

These 64-pin devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider

(CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold

comparisons. They also offer a set of Core Independent Peripherals such as Complementary Waveform Generator

(CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect

(ZCD) and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost.

Core Features

• C Compiler Optimized RISC Architecture

• Only 83 Instructions

• Operating Speed:

- DC – 64 MHz clock input

- 62.5 ns minimum instruction cycle

• Programmable 2-Level Interrupt Priority

• 31-Level Deep Hardware Stack

• Four 8-Bit Timers (TMR2/4/6/8) with Hardware

Limit Timer (HLT)

• Five 16-Bit Timers (TMR0/1/3/5/7)

• Low-Current Power-on Reset (POR)

• Power-up Timer (PWRT)

• Brown-out Reset (BOR)

• Low-Power BOR (LPBOR) Option

• Programmable Code Protection

• Windowed Watchdog Timer (WWDT):

- Timer monitoring of overflow and underflow

events

- Variable prescaler selection

- Variable window size selection

- All sources configurable in hardware or

software

eXtreme Low-Power (XLP) Features

• Sleep mode: 50 nA @ 1.8V, typical

• Windowed Watchdog Timer: 500 nA @ 1.8V,

typical

• Secondary Oscillator: 500 nA @ 32 kHz

• Operating Current:

- 8 uA @ 32 kHz, 1.8V, typical

- 32 uA/MHz @ 1.8V, typical