PIC18F2523数据手册Microchip中文资料规格书

特性 Features

• to 10 MIPS performance
• C compiler optimized RISC architecture
• 8 x 8 Single Cycle Hardware Multiply
• Internal oscillator support - 31 kHz to 8 MHz, up to 32 MHz with 4X PLL
• Fail-Safe Clock Monitor – allows safe shutdown if clock fails
• Watchdog Timer with separate RC oscillator
• Wide operating Voltage range; 2.0V to 5.5V
• Run, Idle and Sleep modes
• Idle mode currents down to 5.8uA typical
• Sleep mode currents down to 0.1uA typical
• 12-bit ADC, 13 channels, 50K samples per second
• Programmable Low Voltage Detection Module
• Programmable Brown-out Reset module
• Two Analog comparators with input multiplexing
• Master Synchronous Serial Port supports SPI ™ and I2C™ Master and Slave Mode
• EUSART module including LIN bus support
• Four Timer Modules
• Up to 2 PWM outputs
• Up to 2 Capture / Compare