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PIC16F17154中文资料微芯科技数据手册PDF规格书
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PIC16F17154规格书详情
Core Features
• C Compiler Optimized RISC Architecture
• Operating Speed:
– DC – 32 MHz clock input
– 125 ns minimum instruction time
• 16-Level Deep Hardware Stack
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power Brown-out Reset (LPBOR)
• Windowed Watchdog Timer (WWDT)
