PI7C8140A数据手册集成电路（IC）的专用规格书PDF

特性 Features

32-bit Primary and Secondary Ports run up to 66MHz
Compliant with the PCI Local Bus Specification, Revision 2.2
Compliant with PCI-to-PCI Bridge Architecture Specification, Revision 1.1.
All I/O and memory commands
Type 1 to Type 0 configuration conversion
Type 1 to Type 1 configuration forwarding
Type 1 configuration write to special cycle conversion
Compliant with the Advanced Configuration Power Interface (ACPI)
Compliant with the PCI Power Management Specification, Revision 1.1.
Provides internal arbitration for four secondary bus masters 
Programmable 2-level priority arbiter 
PCI Clockrun support
Supports posted write buffers in all directions
Four 128 byte FIFO’s for delay transactions
Two 128 byte FIFO’s for posted memory transactions
Enhanced address decoding
32-bit I/O address range
32-bit memory-mapped I/O address range 
64-bit prefetchable address range
Extended commercial temperature range 0°C to 85°C
3.3V and 5V signaling
128-pin QFP package