PI6ULS5V9617A数据手册集成电路（IC）的信号缓冲器、中继器、分离器规格书PDF

特性 Features

2 channel, bidirectional buffer isolates capacitance and allows 540pF on either side of the device at 1 MHz and up to 4000 pF at lower speeds
Voltage level translation from 0.6V to 5.5V and from 2.2V to 5.5V
Footprint and functional replacement for PI6ULS5V9617A at Fast-mode speeds
Port A operating supply voltage range of 0.6V to 5.5V with normal levels(0.4VCC(A) + 0.8V ≤ VCC(B) )
Port B operating supply voltage range of 2.2V to 5.5V with static offset level
5V tolerant I2C-bus and enable pins
0 Hz to 1 MHz clock frequency (the maximum system operating frequency may be less than 1MHz because of the delays added by the repeater)
Active HIGH repeater enable input referenced to VCC(B)
Open-drain input/outputs
Latching free operation
Supports arbitration and clock stretching across the repeater
Accommodates Standard-mode, Fast-mode and Fast-mode Plus I 2C-bus devices, SMBus (standard and high power mode), PMBus and multiple masters
Powered-off high-impedance I2C-bus pins
ESD protection exceeds 8000V HBM per JESD22- A114
Package: MSOP-8L, SOIC-8L and TDFN2x3-8L