PI6CG33202C数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The PI6CG33202C is a 2-output very low power PCIe Gen1/Gen2/ Gen3/Gen4/Gen5 clock generator. It uses 25MHz crystal or CMOS reference as an input to generate the 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 8 external resistors and make layout easier. An additional buffered reference output is provided to serve as a low noise reference for other circuitry.

It uses Diodes' proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements.It also provides various options such as different slew rate and amplitude through SMBUS so that users can configure thedevice easily to get the optimized performance for their individual boards. The device also supports selectable spread-spectrum options to reduce EMI for various applications.

特性 Features

•3.3V Supply Voltage
•Crystal/CMOS input: 25 MHz
•2 Differential low power HCSL outputs with on-chip termination
•Default ZOUT = 85Ω
•Individual output enable
•Reference CMOS output
•Programmable slew rate and output amplitude for each output
•Differential outputs blocked until PLL is locked
•Selectable 0%, -0.25% or -0.5% spread on differential outputs
•Strapping pins or SMBus for configuration
•Differential Output-To-Output Skew <50ps
•Very-Low Jitter Outputs- Differential Cycle-To-Cycle Jitter <50ps- PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Compliant- CMOS REFOUT Phase Jitter   
• < 0.3ps RMS, SSC off   
• <1.5ps RMS, SSC on
•Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
•Halogen and Antimony Free. “Green” Device (Note 3)
•For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable,and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative.https://www.diodes.com/quality/product-definitions/
•Packaging (Pb-free & Green): 24-lead 4×4mm TQFN