TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology the device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended

文件：69.19 Kbytes 页数：8 Pages

PHI

PHI

TrenchMOS transistor Standard level FET

恩XP

TrenchMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode, logic level, field-effect power transistor in a plastic envelope using ’trench’ technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. FEATURES • ’Trench’

文件：80.86 Kbytes 页数：10 Pages

PHI

PHI

Isc N-Channel MOSFET Transistor

• FEATURES • With To-252(DPAK) package • Low input capacitance and gate charge • Low gate input resistance • 100 avalanche tested • Minimum Lot-to-Lot variations for robust device performance and reliable operation • APPLICATIONS • Switching applications

文件：250.16 Kbytes 页数：2 Pages

ISC

无锡固电

TrenchMOS transistor Logic level FET

GENERAL DESCRIPTION N-channel enhancement mode, logic level, field-effect power transistor in a plastic envelope using ’trench’ technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. FEATURES • ’Trench’

文件：80.86 Kbytes 页数：10 Pages

PHI

PHI