丝印：pH；Package：SOT886；Low-power 2-input EXCLUSIVE-OR gate

1. General description The 74AUP1G86 is a single 2-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. Thi

文件：274.11 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：pH；Package：SOT1115；Low-power 2-input EXCLUSIVE-OR gate

1. General description The 74AUP1G86 is a single 2-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. Thi

文件：274.11 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：pH；Package：SOT1202；Low-power 2-input EXCLUSIVE-OR gate

1. General description The 74AUP1G86 is a single 2-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. Thi

文件：274.11 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：pH；Package：SOT353-1；Low-power 2-input EXCLUSIVE-OR gate

1. General description The 74AUP1G86 is a single 2-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. Thi

文件：274.11 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：pH；Package：SOT1226-3；Low-power 2-input EXCLUSIVE-OR gate

1. General description The 74AUP1G86 is a single 2-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. Thi

文件：274.11 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：pH；Package：SOT1116；Low-power dual 2-input EXCLUSIVE-OR gate

1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power con

文件：257.17 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：pH；Package：SOT1203；Low-power dual 2-input EXCLUSIVE-OR gate

1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power con

文件：257.17 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：PH；Package：SSOP5；Voltage Detector IC Adjustable Output Delay

Silicon Monolithic Integrated Circuit Featues 1. Detection voltage lineup : 2.3 ~ 6.0V 2. High precision detection voltage : +- 1.0.

文件：316.57 Kbytes 页数：6 Pages

ROHM

罗姆

丝印：PH；Package：SSOP5；Free Delay Time Setting CMOS Voltage Detector IC Series

Description ROHM’s BD52□□G/FVE and BD53□□G/FVE series are highly accurate, low current consumption reset IC series with a built-in delay circuit. The lineup was established with tow output types (Nch open drain and CMOS output) and detection voltages range from 2.3V to 6.0V in increments of 0.1V,

文件：400.42 Kbytes 页数：16 Pages

ROHM

罗姆

丝印：PH；Package：VSOF5；Free Delay Time Setting CMOS Voltage Detector IC Series

Description ROHM’s BD52□□G/FVE and BD53□□G/FVE series are highly accurate, low current consumption reset IC series with a built-in delay circuit. The lineup was established with tow output types (Nch open drain and CMOS output) and detection voltages range from 2.3V to 6.0V in increments of 0.1V,

文件：400.42 Kbytes 页数：16 Pages

ROHM

罗姆