PEF20525中文资料PDF规格书
PEF20525规格书详情
Introduction
The SEROCCO-H is a Serial Communication Controller with two independent serial channels1). The serial channels are derived from updated protocol logic of the ESCC and DSCC4 device family providing a large set of protocol support and variety in serial interface configuration. This allows easy integration to different environments and applications.
Features
Serial communication controllers (SCCs)
• Two independent channels
• Full duplex data rates on each channel of up to 12.5 Mbit/s sync - 2 Mbit/s with DPLL
• 64 Bytes deep receive FIFO per SCC
• 64 Bytes deep transmit FIFO per SCC
Serial Interface
• On-chip clock generation or external clock sources
• On-chip DPLLs for clock recovery
• Baud rate generator
• Clock gating signals
• Clock gapping capability
• Programmable time-slot capability for connection to TDM interfaces (e.g. T1, E1)
• NRZ, NRZI, FM and Manchester data encoding
• Optional data flow control using modem control lines (RTS, CTS, CD)
• Support of bus configuration by collision detection and resolution
Bit Processor Functions
• HDLC/SDLC Protocol Modes
– Automatic flag detection and transmission
– Shared opening and closing flag
– Generation of interframe-time fill ’1’s or flags
– Detection of receive line status
– Zero bit insertion and deletion
– CRC generation and checking (CRC-CCITT or CRC-32)
– Transparent CRC option per channel and/or per frame
– Programmable Preamble (8 bit) with selectable repetition rate
– Error detection (abort, long frame, CRC error, short frames)
• Bit Synchronous PPP Mode
– Bit oriented transmission of HDLC frame (flag, data, CRC, flag)
– Zero bit insertion/deletion
– 15 consecutive ’1’ bits abort sequence
• Octet Synchronous PPP Mode
– Octet oriented transmission of HDLC frame (flag, data, CRC, flag)
– Programmable character map of 32 hard-wired characters (00H-1FH)
– Four programmable characters for additional mapping
– Insertion/deletion of control-escape character (7DH) for mapped characters
• Extended Transparent Mode
– Fully bit transparent (no framing, no bit manipulation)
– Octet-aligned transmission and reception
• Protocol and Mode Independent
– Data bit inversion
– Data overflow and underrun detection
– Timer
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产品属性
- 型号:
PEF20525
- 制造商:
INFINEON
- 制造商全称:
Infineon Technologies AG
- 功能描述:
2 Channel Serial Optimized Communication Controller for HDLC/PPP
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
INFINEON |
21+ |
QFP100 |
4134 |
只做原装,绝对现货,原厂代理商渠道,欢迎电话微信查 |
询价 | ||
INFINEON |
23+ |
QFP |
8890 |
价格优势/原装现货/客户至上/欢迎广大客户来电查询 |
询价 | ||
Infineon |
22+ |
BGA |
3000 |
原装现货 |
询价 | ||
INFINEON |
2020+ |
QFP-100 |
350000 |
100%进口原装正品公司现货库存 |
询价 | ||
INFINEO |
2020+ |
QFP |
26 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
询价 | ||
INFINEON/英飞凌 |
22+ |
QFP100 |
12245 |
现货,原厂原装假一罚十! |
询价 | ||
INFINEON/英飞凌 |
23+ |
QFP |
9920 |
原装正品,支持实单 |
询价 | ||
INTEL/英特尔 |
20+ |
SMD |
880000 |
明嘉莱只做原装正品现货 |
询价 | ||
INFINEON/英飞凌 |
21+ |
QFP100 |
9850 |
只做原装正品假一赔十!正规渠道订货! |
询价 | ||
INFINEON |
23+ |
QFP |
4865 |
中国航天工业部战略合作伙伴行业领导者 |
询价 |